How can i generate vcd file with recent version of Chisel?

I used to generate the vcd file through chiseltest like below.

import chisel3._
import chiseltest._
import org.scalatest.flatspec.AnyFlatSpec

class MyModuleSpec extends AnyFlatSpec with ChiselScalatestTester {
  behavior of "MyModule"
  it should "do something" in {
    test(new MyModule).withAnnotations(Seq(WriteVcdAnnotation)) { c =>
      c.io.in.poke(0.U)
      c.clock.step()
      c.io.out.expect(0.U)
      c.io.in.poke(42.U)
      c.clock.step()
      c.io.out.expect(42.U)
      println("Last output value : " + c.io.out.peek().litValue)
    }
  }
}

As far as i know keyword withAnnotations(Seq(WriteVcdAnnotation)) generates the vcd file

Modifying my code for newest version of Chisel, i edited my test code like below

import chisel3._
import chisel3.experimental.BundleLiterals._
import chisel3.simulator.EphemeralSimulator._
import org.scalatest.freespec.AnyFreeSpec
import org.scalatest.matchers.must.Matchers

class MyModuleSpec extends AnnFreeSpec with Matcher{

  " My module do something" in {
    simulate(new MyModule).withAnnotations(Seq(WriteVcdAnnotation)) { c =>
      c.io.in.poke(0.U)
      c.clock.step()
      c.io.out.expect(0.U)
      c.io.in.poke(42.U)
      c.clock.step()
      c.io.out.expect(42.U)
      println("Last output value : " + c.io.out.peek().litValue)
    }
  }
}

However, recent version of chisel which use svsim instead of chiseltest for test code cannot use this keyword withAnnotations(Seq(WriteVcdAnnotation)) with simulate function.

So, this code generates error.

I've been searching for the keywords that generate vcd in chisel test code.

Which keyword should i use for generating vcd file like older version of chisel in newest chisel?

Thank you.