Select a single enq/deq interface from a vector in IO to connect to a module in Chisel3

I have a module with a vector of Enq/Deq interfaces as IO. Internally, I instantiate a module with a single Enq/Deq interface. I want to be able to input an index that will select Enq/Deq input interfaces and connect it to my internal module.

The code:

class TopModule(busWidth: Int = 4, numberOfBuffers: Int = 4) extends Module {
    val io = IO(new Bundle {
        val enq = Vec(numberOfBuffers, Flipped(Decoupled(UInt(busWidth.W))))
        val deq = Vec(numberOfBuffers, Decoupled(UInt(busWidth.W)))
        val command = Input(UInt(2.W))
        val bufferSelect = Output(UInt(log2Ceil(numberOfBuffers).W))
    })

    val myModule = Module(new MyModule(busWidth, numberOfBuffers))

    myModule.io.bufferSelect <> io.bufferSelect
    myModule.io.command <> io.command

    for (i <- 0 until numberOfBuffers - 1) {
         when(myModule.io.bufferSelect === i.U) {
             myModule.io.enq <> io.enq(i)
             myModule.io.deq <> io.deq(i)
         }.otherwise {
            kvTransfer.io.enq <> io.enq(0)
            kvTransfer.io.deq <> io.deq(0)
         }
    }
}

When I try to run tests, it fails with the following error message:

firrtl.passes.PassExceptions: firrtl.passes.CheckInitialization$RefNotInitializedException:  : [module TopModule]  Reference io is not fully initialized.
[info]    : io.deq[0].bits <= mux(_T, myModule.io.deq.bits, VOID)

I have spent a couple of hours trying to switch/is, adding .otherwise to when, etc. but it didn't work.

When I add .otherwise with io.enq(0) and io.deq(0) I don't get error for zero index but still get the same errors for indexes 1 to 3.

Could you please help with the issue? Thank you.

Chisel version 3.5.4