proteanTecs

proteanTecs at the TSMC OIP China Ecosystem Forum! We’re proud to participate in this leading event, where innovation meets collaboration. Come hear Dragon Hsu, Senior Director of Application Engineering at proteanTecs as he presents, "Revolutionizing System Production Testing with On-Chip Telemetry and ML-Driven Analytics" showcasing how our deep data embedded monitoring solutions help drive the next wave of #AI, #Cloud, #HPC, and #Automotive advancements. Our technology enables customers to cut power consumption, accelerate time-to-market, extend device lifetime, and dramatically reduce DPPMs, all proven in silicon on TSMC’s hashtag #N2P process for a customer device. Hear how we’re empowering advanced electronics with deeper visibility and reliability, from design to deployment. #TSMC #OIP #China #Semiconductors#AI #ChipDesign #OnChipMonitoring #proteanTecs

🚀 Excited to Join TSMC Europe OIP Ecosystem Forum 2025! proteanTecs will be exhibiting at the TSMC Europe OIP Ecosystem Forum on November 25, 2025! Visit our booth to experience silicon-proven deep-data, embedded on-chip monitoring solutions that power next-gen #AI, #cloud, and #automotive applications, now available on advanced nodes including #2nm production. We’re proud to be silicon-proven on TSMC #N2P! See live demos and learn how we’re enabling the first-ever parametric visibility during functional test, unlocking real-time insights when software meets silicon. Our demos will be featuring: 🔸 Power & performance optimization for AI SoCs in data center 🔸 Failure prevention through real-time health monitoring Our customers are already achieving: 🔸 25% faster time-to-market 🔸 14% power savings 🔸 18% lifetime extension 🔸 10x DPPM reduction Let’s connect at the event! We look forward to seeing you there! Ioannis Syranidis #TSMC #proteanTecs #OnChipMonitors

📢 Breaking News! proteanTecs and Akeana Announce Joint Initiative to Drive RISC-V Processor Performance! We are thrilled to announce a joint initiative between proteanTecs and Akeana. This powerful collaboration is set to deliver a joint solution for RISC-V processors that enhances power and performance, speeds product ramp, and improves in-field reliability for next-generation devices. The joint solution integrates proteanTecs’ Hardware IP Monitoring System with Akeana’s 5000 Series Processors. By embedding proteanTecs Agents into Akeana’s configurable 64-bit RISC-V processor technology, customers gain unprecedented visibility and control. Amit Nanda, VP of Strategy, Solutions, and Partnerships at Akeana says: “proteanTecs brings unmatched on-chip visibility. As processors scale in complexity and are tasked with increasingly intensive AI workloads, that level of insight becomes essential." Uzi Baruch, Chief Strategy Officer at proteanTecs says: “By combining proteanTecs’ embedded monitoring and deep data insights into Akeana’s high-performance RISC-V processors we will help our mutual customers accelerate product ramp, reach peak performance, and proactively guard against failures, not just during production, but across the entire lifecycle of their systems.” 👉 Read how proteanTecs and Akeana are advancing RISC-V International adoption for the most demanding applications. See the news here: https://hubs.la/Q03V0DZb0 #RISCV #proteanTecs #InChipMonitors #Akeana

3 Critical Optimization Requirements Driving the AI Arms Race The race for #GenAI leadership has never been fiercer. Deals among top #AI semiconductor players are announced almost daily, and three priorities now dominate every roadmap: 🔸 Performance 🔸 Power efficiency 🔸 Reliability Yet knowing where bottlenecks lie and how to minimize them is the real differentiator. Even a 1% performance boost can save weeks of training and millions in costs. But traditional RTL optimization and AFS can’t keep up with GenAI demands. Power directly affects TCO, lifetime, and sustainability, but current DVFS and AVS with guardbands waste potential. Reliability is under siege by Silent Data Corruption (#SDC), including real failures that can halt training runs of 25K GPUs and cost over $100M. So how do you overcome these limitations? At proteanTecs, we close these gaps with real-time, on-chip optimization. Our embedded monitors deliver telemetry-driven visibility from production through in-field, transforming conservative margins into competitive advantage. Read Part III of our AI blog series for more on how to optimize for AI, Critical Optimization Factors for GenAI Chipmakers: 👉 https://lnkd.in/g9A7EGGm

🌟 Exciting news from proteanTecs Japan! We’re thrilled to announce the appointment of Noritaka Kojima as General Manager of proteanTecs Japan, along with the opening of our new office in Yokohama, Kanagawa. This new leadership and office mark an important milestone in strengthening proteanTecs presence in the Japanese marketplace, serving our partners and customers with extended local support and collaboration as well as advancing new business opportunities in the strong Japanese semiconductor market, especially in the automotive industry. Mr. Kojima brings over 20 years of experience in the semiconductor industry, with the past decade spent in leadership roles, most recently serving as Head of Hailo Japan. His deep technical expertise and proven track record in driving growth and partnerships will play a key role in expanding proteanTecs’ footprint in Japan. According to Nori Kojima, GM proteanTecs Japan: “The purpose of opening our Japan office is clear: to build strong, long-term partnerships with our customers, helping them achieve higher reliability and operational efficiency for their most complex designs. We are committed to serving as a true technology partner, not merely a solution provider, working side by side with our customers to address their challenges.” We look forward to enriching our relationships and driving innovation in the Japanese market together. 👉 Read more here: https://lnkd.in/gsHMg2dW

📅 TOMORROW! WEBINAR & LIVE DEMOS: Accelerating NPI with Deep Data: From First Silicon to Volume 👉 https://hubs.la/Q03Ss-bN0 NPI (New Product Introduction) is where innovation meets production, the moment of truth for every new chip. The goal? Ensure your silicon meets specs and can ramp to volume with confidence. But at advanced technology nodes, NPI is becoming tougher than ever. Shrinking process margins, complex architectures, and exploding data demands are raising the bar for success. Common NPI challenges include: 🔸 Wider performance spreads caused by manufacturing variability at nanoscale geometries 🔸 Escalating test time, cost, and data management complexity 🔸 Reliability that’s harder to predict as aging and stress effects intensify 🔸 Faster time-to-market pressure colliding with slower model-to-silicon feedback Discover how on-chip parametric deep data can help you overcome these challenges, enabling faster silicon learning, better yield, and smoother ramp to volume. Join us tomorrow for a webinar profiling real-world use cases and live demos. 👉 https://hubs.la/Q03Ss-bN0

🙌 Thank you, embedded world Exhibition&Conference & Conference North America 2025! We appreciate the opportunity to meet colleagues and customers to share how proteanTecs is helping customers achieve power efficiency, performance, and reliability in today’s AI-driven systems. Our presentation, “Power Reduction and Failure Prevention in Chiplet-Based Physical AI Platforms with Embedded On-Chip Monitoring,” highlighted how advanced on-chip telemetry enables our customers to achieve continuous chip health and performance optimization, including interconnect modeling, from design to in-field operation. These capabilities are especially critical for #GenAI, #AIinference, and complex #chiplet architectures. 🔍 Learn more about how proteanTecs’ power solution helps achieve your design, performance, and reliability goals through novel telemetry-based deep data technology: ➡️ Read our white paper: Extending Chip Lifetime with Safer Voltage Scaling https://hubs.la/Q03Sw5mp0 Alex Burlak #EmbeddedWorld #proteanTecs #Semiconductors #OnChipMonitoring

✨Thank you for joining us at the RISC-V International Summit! We had an incredible time connecting with industry peers and customers at the event. A special thanks to everyone who attended and participated in the engaging discussion around in-situ monitoring, deep data analytics, and the future of RISC-V architectures. Ziv Paz, proteanTecs VP of Business Development, and Marc Evans from Andes Technology explored how integrating proteanTecs’ deep data IP into Andes’ AX45MPV vector processor brings powerful #AI-ready, real-time visibility into next-generation #cloud and #edge systems. We’re proud to collaborate with Andes and the broader #RISC-V community to advance innovation, reliability, and intelligence to scale across the semiconductor ecosystem. 🚀 Looking forward to our next RISC-V event! #RISCV #AndesTechnology #proteanTecs #DeepData #Semiconductors

📅 In 1 Week - WEBINAR: Accelerating NPI with Deep Data: From First Silicon to Volume NPI (New Product Introduction) is a crucial stage that bridges design completion and volume production. The goal is to confirm that the silicon meets specifications and can be reliably produced at scale. Yet at advanced technology nodes, the NPI stage faces increasing challenges due to shrinking process margins, complex architectures, and escalating data and reliability demands. Key NPI challenges include: 🔸Manufacturing variability at nanoscale geometries which cause wider performance spreads 🔸Testing and characterization strain test time, cost, and data infrastructure. Reliability becomes harder to predict as aging and stress effects intensify. 🔸Tighter time-to-market pressures demand faster silicon learning cycles, yet model-to-silicon mismatches slow feedback. Join us for our live webinar with real use-case demonstrations to learn how on-chip parametric deep data can address these issues. Register today! 👉 https://hubs.la/Q03R8NRK0

🌎 Join us at embedded world Exhibition&Conference North America 2025! Power efficiency, performance, and reliability are critical in today’s AI-driven systems. We’re excited to share how on-chip monitoring is enabling all of this and more in our presentation, “Power Reduction and Failure Prevention in Chiplet-Based Physical AI Platform with Embedded On-Chip Monitoring.” At proteanTecs, we provide advanced on-chip telemetry solutions that ensure chip health and performance from design to in-field. Our technology powers #hyperscalers, #AI chipmakers, and #networking vendors, supporting advanced nodes (down to #2nm) and complex #chiplet architectures. Come hear how we’re helping the industry build more efficient, reliable, and intelligent chips. We can’t wait to connect & see you there! #EmbeddedWorld #Semiconductors #AIChips #Chiplets #Reliability #PowerEfficiency #OnChipMonitoring #proteanTecs